. .

Companion Workshop on "Modeling of Reliability Issues"

A companion workshop on "Modeling of Reliability Issues" will be held on Wednesday, May 24, 2006. The workshop is supported by the Christian Doppler Laboratory for TCAD. A special focus will be put on bias temperature instability (NBTI and PBTI) where 11 invited world leading experts on this topic will summarize their most recent findings. Also, a special section covering the workshop contents will be published in Microelectronics Reliability.

The alphabetical list of invited speakers and a short summary of the contents of their talks is given below. The detailed workshop program will be announced soon. For more information on the IWCE companion workshop please contact the workshop organizer directly:

   Tibor Grasser, TU Vienna, Austria



09:00 - 09:05 Welcome
Tibor Grasser
09:05 - 09:40 Negative Bias Temperature Instability: What Do We Understand?
Dieter Schroder
Arizona State University
09:40 - 10:15 On Challenges of Computational Modeling of Reliability Phenomena
Muhammad Alam
Purdue University
10:15 - 10:50 Probing Negative Bias Temperature Instability using a Continuum Numerical Framework: Physics to Real World Operation
Srinivasan Chakravarthi
Texas Instruments
10:50 - 11:10 Break
11:10 - 11:45 NBTI Product Level Reliability Challenges
Helmut Puchner
Cypress Semiconductors
11:45 - 12:20 Negative Bias Temperature Instabilities in HfSiO(N)-based MOSFETs: Electrical Characterization and Modeling
Michel Houssa
12:20 - 12:55 Physical Modeling of Negative Bias Temperature Instabilities for Predictive Extrapolation
Vincent Huard
Philips Semiconductors / Crolles
12:55 - 14:00 Lunchbreak
14:00 - 14:35 Reliability Issues in Power MOSFETs
Martin Pölzl
Infineon Technologies
14:35 - 15:10 Point Defects Involved in MOS Reliability Problems
Patrick Lenahan
Pennsylvania State University
15:10 - 15:45 Hydrogen Transport in Doped and Undoped Disordered Silicon
Norbert Nickel
Hahn-Meitner-Institut / Berlin
15:45 - 16:00 Break
16:00 - 16:35 First-Principles Approach to the Reliability Issues of MOS Gate Oxides
Takuya Maruizumi
Musashi Institute of Technology / Tokyo
16:35 - 17:10 Hydrogen in a MOSFET - The Good, the Bad, and the Ugly
Sokrates Pantelides
Vanderbilt University

Dieter Schroder / Arizona State University

Negative Bias Temperature Instability: What Do We Understand?

We present a brief overview of negative bias temperature instability (NBTI) commonly observed for p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) when stressed with negative gate voltages at elevated temperatures and discuss the results of such stress on device and circuit performance and review interface traps and oxide charges, their origin, present understanding, and changes due to NBTI. Next we discuss some of the models that have been proposed for both NBTI degradation and recovery and p- versus n-MOSFETs. We also address the time and energy dependence effects of NBTI and crystal orientation. Finally we mention some aspect of circuit degradation. The general conclusion is that although we understand much about NBTI, several aspects are poorly understood. This may be due to a lack of a basic understanding or due to varying and sometimes opposing experimental data that are likely the result of simple preparation and measurement conditions.

Dieter K. Schroder has worked with semiconductor material and device electrical characterization for the last 35 years. He received his education at McGill University and at the University of Illinois. He joined the Westinghouse Research Labs. in 1968 where he was engaged in research on various aspects of semiconductor devices, including MOS devices, imaging arrays, power devices, and magnetostatic waves. He spent a year at the Institute of Applied Solid State Physics in Germany during 1978. In 1981 he joined Arizona State University in the Center for Solid State Electronics Research. His current interests are semiconductor devices, defects in semiconductors, semiconductor material and device characterization, low power electronics, and device modeling. He has written two books Advanced MOS Devices and Semiconductor Material and Device Characterization, has published over 150 papers, holds 5 patents, has graduated 91 graduate students, has given many short courses and is a Life Fellow of IEEE. top


Muhammad Alam / Purdue University

On Challenges of Computational Modeling of Reliability Phenomena

Transistor design has always been bracketed by the trade-off between performance and reliability. Yet, even a cursory review of the existing mainstream CAD tools shows that optimization of transistor performance (defined in terms of on-current, on-off ratio, power dissipation, circuit delay, etc.) has been the primary focus of CAD tools and reliability considerations have only been used to define a static guard-band (typically plus-minus 15%) for IC design. Although there have been a number of attempts to develop reliability simulators, these stand-alone reliability tools have never been integrated within mainstream CAD software. In recent years, however, the scenario is beginning to change. As scaling becomes difficult and design margins for high-performance ICs becomes small, a static, worst-case guard-band limited design is both wasteful and unsustainable. Indeed, CAD tools that allow IC-specific optimization for both reliability and performance would allow additional design margins for a given technology node. In this presentation, I will review the development of both TCAD models to predict performance degradation for specific operating conditions as well as IC-design approaches to optimize overall design in response to specific degradation mechanisms. We anticipate that these models and algorithms will percolate to CAD tools in the not-so-distant future.

Muhammad Ashraful Alam is a Professor of Electrical and Computer Engineering at Purdue University where his research and teaching focus on physics, simulation, characterization and technology of classical and novel semiconductor devices. He received a B.S.E.E. degree from Bangladesh University of Engineering and Technology in 1988, the M.S. degree from Clarkson University, Potsdam, NY, in 1991, and the Ph.D. degree from Purdue University, Lafayette, IN, in 1994, all in electrical engineering. From 1995 to 2000, he was with Bell Laboratories, Lucent Technologies, Murray Hill, NJ, as a Member of Technical Staff in the Silicon ULSI Research Department. From 2001 to 2003, he was the Technical Manager of the IC Reliability Group at Agere Systems, Murray Hill, NJ. He joined Purdue University in 2004 and his current research includes theory of oxide reliability, transport in nanocomposite thin film transistors, and nano-bio sensors. Dr. Alam has published over 70 papers in international journals and has presented many invited and contributed talks at international conferences. He received IRPS Best paper award in 2003 and Outstanding paper award in 2001, both for his work on gate oxide reliability. Most recently, he was elected an IEEE Fellow for contribution to physics of CMOS reliability and received IEEE Kiyo Tomiyasu Award for contributions to device technology for communication systems. top


Srinivasan Chakravarthi / Texas Instruments

Probing Negative Bias Temperature Instability using a Continuum Numerical Framework: Physics to Real World Operation

A quantitative model is developed that comprehends all the unique characteristics of NBTI degradation. Several models are critically examined to develop a reaction/diffusion based modeling framework for predicting interface state generation during NBTI stress. The model captures key NBTI features including recovery, experimental delay and frequency effects successfully.

Srini Chakravarthi is a group member of technical staff in Silicon Technology Development at Texas Instruments, Dallas. He received his PhD degree in Materials from Boston University in 2000. His dissertation focused on modeling dopant and defect evolution in silicon during thermal processing. Since 2000, Srini has been in the TCAD group at TI, involved in transistor development for the 90nm and 45nm technology nodes. His areas of interest include process/device modeling and process integration. He has authored/co-authored more than 40 publications/presentations and owns a number of patents. Srini's work on modeling NBTI degradation won the "outstanding paper" award at IRPS symposium 2004. top


Helmut Puchner / Cypress Semiconductors

NBTI Product Level Reliability Challenges

We present a comprehensive review of product level reliability challenges for the 65nm technology node with the focus on NBTI. Historical data will show that hot carrier degradation has lost on importance and that negative bias temperature instability (NBTI) is the leading reliability concern for the 65nm technology node. Product standby currents and regulator designs are highly influenced by transistor reliability. We will present NBTI product reliability data ensuring sufficient product level reliability as well as their correlation attempts to transistor level data for NBTI.

Helmut Puchner was born in Steyr, Austria. He received the 'Diplomingenieur' degree in electrical engineering and the PhD degree from the Vienna Technical University in 1992 and 1996,respectively. He joined LSI Logic Corp. in Santa Clara, CA as a device development engineer in 1997. In 2002 he joined Cypress Semiconductor, where he is responsible for transistor developement, TCAD, compact modeling, and device reliability. His research interests include the development of advanced CMOS structures and power transistors including reliability aspects. He has published more than 60 conference/journal articles and holds 16 US patents. top


Michel Houssa / IMEC

Negative Bias Temperature Instabilities in HfSiO(N)-based MOSFETs: Electrical Characterization and Modeling

Negative bias temperature instabilities (NBTI) are considered as serious reliability issues in metal-oxide-semiconductor field effect transistors (MOSFETs), affecting the threshold voltage, drive current and mobility of the devices. NBTI in HfSiO(N)-based MOSFETs are investigated, with an emphasis on the impact of N content on device degradation. Increasing the concentration of nitrogen in the high- k gate stack results, like in SiON-based devices, in enhanced NBTI. Combining fast Vth measurements and charge pumping measurements during NBT stress allows us to separate the contribution of fast (interface) states and slow (bulk) traps to device degradation. The kinetics, field and temperature dependence of these defects is studied. Finally, the experimental results are modeled, considering the generation of interface defects, within the reaction-dispersive proton transport model, as well as the creation of slow (bulk) traps in the high-k layer, related to hole trapping at nitrogen-related defects.

Michel Houssa received the M.S. and Ph.D. degrees in Physics from the University of Liege, Belgium, in 1993 and 1996, respectively. From 1997 to 1999, he was researcher at IMEC, working on the characterization and modeling of the electrical properties of ultra-thin gate oxides. From 1999 to 2001, he was a postdoctoral fellow from the Belgian National Fund for Scientific Research, working at the Semiconductor Physics Laboratory of the University of Leuven, on the characterization and modeling of the electrical properties of high-k gate dielectrics. From 2001 to 2003, he was associate professor of physics at the University of Provence, working at the Laboratory for Materials and Microelectronics of Provence. Since 2003, he is a Senior Scientist at IMEC, where he is working on the reliability of high-k gate dielectrics and the characterization and modeling of Ge and III-V based MOS devices. Since 2006, he is also part-time Associate Professor at the Department of Electrical Engineering, University of Leuven. He has authored or co-authored about 180 papers published in scientific journals or presented at international conferences, five book chapters, and edited a review book on high-k gate dielectrics, published by the Institute of Physics Publishing. He is currently serving as a technical program committee member of the IEEE Semiconductor Interface Specialists Conference (SISC) and the IEEE International Reliability Physics Symposium (IRPS). top


Vincent Huard / Philips Semiconductors / Crolles

Physical Modeling of Negative Bias Temperature Instabilities for Predictive Extrapolation

Based on recent developments in the analysis of the NBTI degradation, the emphasis will be put on three main topics. First, several measurement methodologies will be compared to figure out how to totally assess the degradation in spite of the presence of transient effects. Second, due to an optimized measurement approach, the consequences on the understanding of underlying physical mechanisms will be described. Finally, the consequences of the various contributions on extrapolation laws will be discussed.

Vincent Huard received the B.S. (1996) in physics and the M.S. (1997) in electrical engineering from the Institut National Polytechnique de Grenoble (INPG). He worked for the CEA-Grenohle on the MBE growth of 11-VI based doped heterostructures and their optical and electrical characterization. He received his Ph.D. (2000) in physics from the University of Grenoble. In 2000 and 2001, he was a Visiting Scholar at the University of California, where he worked on ferromagnetic materials on top of semiconductors. In 2002, he joined Philips Semiconductors as a reliability engineer. His current research interests include oxide reliability and NBTl degradation. top


Martin Pölzl / Infineon Technologies

Reliability Issues in Power MOSFETs

We present process influences on NBTI as observed on 30nm-GOX trench MOS FETs of two recent power technologies. Both front end of line (FEOL) und backend of line (BEOL) processes are shown to have major effects on the interface quality. A p-channel device serves as demonstrator that nitrogen, introduced into the MOS system during a long-time, high-temperature diffusion step in FEOL processing, plays a major role in the NBTS characteristics. For a n-channel device, we discuss influences of the metallization/passivation BEOL stack on nBTI, but also on initial MOS characteristics and time dependent breakdown. Here, effects are attributed to the release of reactive hydrogen from PECVD deposited silicon-nitride layers.

Martin Pölzl is a group member of technical staff in Power MOSFET Technology Development at Infineon, Villach. He received his M.S of Technical Physics from Technical University of Vienna in 1996 (thesis on "charging damage"in MOS processing). He started his work on reliability issues of discrete Power MOSFETs in 1998 at SIEMENS, Villach. In 2000 he changed into the technology development group responsible for FEOL processing of new Power Trench MOS devices. His current interests include oxide reliability issues like HCI, NBTI, TDDB. top


Patrick Lenahan / Pennsylvania State University

Point Defects Involved in MOS Reliability Problems

There are a number of instabilities in both conventional (SiO2 and nitrided SiO2 based) and novel (for example HfO2 based) MOS technology which are apparently fundamental limits to device reliability and performance. Important instabilities occur under a wide variety of circumstances: when p-channel MOSFETs are subjected to modest negative gate bias at elevated temperatures, when gate oxides are subjected to high electric fields, when devices are subjected to ionizing radiation. Recently, some 'atomic scale' understanding of these fundamental reliability problems has developed, in part, through sensitive magnetic resonance studies of variously stressed devices. This talk will provide an introduction to point defects involved in these device instabilities as well as a brief discussion of statistical mechanics relevant to the roles these defects play in device operation. The presentation will include device reliability problems of greatest presently day interest including the negative bias temperature instability and instabilities in HfO2 based devices.

P.M. Lenahan earned his B.S. degree from the University of Notre Dame and his Ph.D. from the University of Illinois, Champaign-Urbana. After completing his Ph.D. in 1979, he was a post-doctoral fellow at Princeton University in 1979 and 1980. From 1980 until 1985 he was a member of the technical staff in the Materials Research Directorate of Sandia National Laboratories in Albuquerque, New Mexico. Since 1985 he has been at Penn State University where he is Professor of Engineering Science and Mechanics (ESM). In 2001, he was visiting professor of Electronics and Computer Engineering at Nihon University, Tokyo, Japan. From 2000-2005, he also served as associate editor of the Journal of Electronic Materials. He has authored over 130 publications, approximately 150 conference presentations, and one patent. The publications have been cited over 2600 times in the technical and scientific literature. His research has been primarily focused upon the trapping centers in HfO2, amorphous SiO2, nitrogen, phosphorous, and boron "doped" SiO2, silicon nitrides, silicon oxynitrides, Si/SiO2 interfaces, SiC/SiO2 interfaces, and silicon grain boundaries with a variety of electrical measurements and electron spin resonance techniques. Current interests include NBTI, materials problems in high-k gate dielectrics, and materials problems in SiC MOSFETs and BJTs. top


Norbert Nickel / Hahn-Meitner-Institut / Berlin

Hydrogen Transport in Doped and Undoped Disordered Silicon

Hydrogen transport in amorphous, microcrystalline, and polycrystalline silicon has been studied intensively in the past due to its importance for understanding structure, growth, metastability, and defect passivation. Further substantial insight in the microscopic mechanism governing hydrogen diffusion can be obtained by comparing diffusion in doped material with H diffusion in undoped disordered silicon. Hydrogen migration was investigated by deuterium diffusion-experiments as a function of temperature, deuterium, phosphorous, and boron concentrations. At high D concentrations the diffusion is dispersive depending on the plasma exposure time. With increasing doping concentration the effective diffusion-coefficient, Deff, increases. Poly-Si doped with a boron concentration of 1018 cm-3 exhibits an increase of Deff by one order of magnitude compared to undoped poly-Si. On the other hand, phosphorous doped poly-Si shows only a 40% increase of Deff. The diffusion activation energy, EA, depends significantly on the Fermi energy EF and the hydrogen concentration. In polycrystalline silicon EA varies between 0.1 and 1.69 eV while in microcrystalline silicon the diffusion activation energy varies between 0.01 and 0.4 eV. This is accompanied by a variation of the diffusion prefactor by 15 orders of magnitude and is even consistent with results reported on H diffusion in hydrogenated amorphous silicon. Using the theoretical diffusion prefactor the energy EA required to yield the diffusion coefficient was calculated. EA reveals a Fermi energy dependence similar to that of the formation energy of H+ and H- in c-Si. Based upon the experimental data a unified microscopic model for H diffusion in silicon is proposed. top


Takuya Maruizumi / Musashi Institute of Technology / Tokyo

First-Principles Approach to the Reliability Issues of MOS Gate Oxides

The reliability issues of gate oxides are crucial for the development of nano-scale MOS devices. We have tackled some reliability problems with the aid of first-principles calculations. One of the problems is the NBTI (Negative Bias Temperature Instability). The reactions and resultant structural changes at Si/SiO2 and Si/SiOxNy interfaces under NBTI stress were examined in detail to investigate the atomistic mechanism of NBTI. Our results and proposed mechanism of electric-filed dependence of NBTI will be reviewed.

Takuya Maruizumi was born in Hyogo Prefecture, Japan, on October 16, 1952. He received the B.S., M.S., and Ph.D. degrees in analytical chemistry from the University of Tokyo, Japan, in 1975, 1977, and 1980, respectively. He joined Hitachi Ltd., Tokyo, Japan, in 1980, where he was engaged in research on molecular simulations including rational design of ionophore for chemical sensor, process modeling of chemical vapor deposition for ULSI applications, and atomistic evaluation of thin SiO2 reliability. He moved to Musashi Institute of Technology in 2004 as an professor of the department of electrical and electronics engineering. He is a member of the Japan Society of Applied Physics, and the Chemical Society of Japan. top

Sokrates Pantelides / Vanderbilt University

Hydrogen in a MOSFET - The Good, the Bad, and the Ugly

Recent investigations using first-principles quantum mechanical calculations in conjunction with experimental data have led to significant new understanding of the role of hydrogen in a MOSFET. Hydrogen passivates defects, but, under a variety of conditions (radiation, electric fields, long-term storage, etc.), it is responsible for degradation. An account will be given of pertinent atomic-scale mechanisms and progress in incorporating the mechanisms in engineering-level models. Collaborators: L. Tsetseris, S. N. Rashkeev, I. Batyrev, D. M. Fleetwood and R. D. Schrimpf. Work supported in part by the Air Force Office of Scientific Research and the U.S. Navy.

Sokrates T. Pantelides received his PhD in Physics from the University of Illinois at Urbana-Champaign in 1973, spent two years at Stanford as a post-doc, and then joined the IBM T. J. Watson Research Center in Yorktown Heights. He carried out theoretical research primarily in semiconductors and related materials and served in several management positions. In 1994 he joined the faculty of Vanderbilt University as the first McMinn Professor of Physics. Since 1995 he has held a secondary appointmnet as Distinguished Visiting Scientist at Oak Ridge National Laboratory. His research activities span semiconductor physics, transport in nanostructures and molecules, nanocatalysis, and optical properties. He is a Fellow of the Americal Physical Society and the American Association for the Advancement of Science. top